Rocketchip FPGA mapped to Zynq ZC706

The current rocketchip implementation only tested on ZC706 FPGA, it should work for other Zynq FPGAs. Refer to https://github.com/ucb-bar/fpga-zynq for details.

Build the GCC toolchain

1. It is recommended to build the toolchain from source.

    git clone https://github.com/riscv/riscv-gnu-toolchain.git
    cd riscv-gnu-toolchain
    git submodule update --init --recursive
    export RISCV=/opt/riscv
    ./configure --prefix="${RISCV}" --enable-multilib
    make linux
   

   After it is built, add the $RISCV/bin folder to your PATH. The built toolchain works for both 32-bit and 64-bit.

2. Alternatively, any pre-built toolchain with multilib enabled should work.

Building seL4test

Checkout the sel4test project using repo as per seL4Test

repo init -u https://github.com/seL4/sel4test-manifest.git
repo sync
mkdir cbuild
cd cbuild
../init-build.sh -DPLATFORM=rocketchip -DRISCV64=1
# The default cmake wrapper sets up a default configuration for the target platform.
# To change individual settings, run `ccmake` and change the configuration
# parameters to suit your needs.
ninja

Generated binaries can be found in the images/ directory.