Zynq7000

This board is a Zynq-7000 ZC706 Evaluation Kit, Rev 1.2

Xilinx maintains online material, including designs and documentation here.

Building

seL4test

Checkout the sel4test project using repo as per seL4Test

repo init -u https://github.com/seL4/sel4test-manifest.git
repo sync
mkdir cbuild
../init-build -DPLATFORM=zynq7000 -DAARCH32=1
# The default cmake wrapper sets up a default configuration for the target platform.
# To change individual settings, run `ccmake` and change the configuration
# parameters to suit your needs.
ninja
# If your target binaries can be executed in an emulator/simulator, and if
# our build system happens to support that target emulator, then this script
# might work for you:
./simulate

If you plan to use the ./simulate script, please be sure to add the -DSIMULATION=1 argument when running cmake.

Generated binaries can be found in the images/ directory.

U-Boot

Use the following patch to set up an appropriate u-boot environment and enable elf loading:

From 8fb3caeb735b7cb6be409842a3e130a8a4173ad3 Mon Sep 17 00:00:00 2001
From: Adrian Herrera <adrian.herrera@dsto.defence.gov.au>
Date: Wed, 5 Nov 2014 09:58:00 +1030
Subject: [PATCH] Added Zynq ZC70x board for seL4

Currently only boots from a FAT-formatted SD card; so no network boot yet
---
 boards.cfg                        |  1 +
 include/configs/zynq_zc70x_sel4.h | 60 +++++++++++++++++++++++++++++++++++++++
 2 files changed, 61 insertions(+)
 create mode 100644 include/configs/zynq_zc70x_sel4.h

diff --git a/boards.cfg b/boards.cfg
index 7beb3c8..960b374 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -384,6 +384,7 @@ Active  arm         armv7          u8500       st-ericsson     u8500
 Active  arm         armv7          vf610       freescale       vf610twr            vf610twr                              vf610twr:IMX_CONFIG=board/freescale/vf610twr/imximage.cfg                                                                         Alison Wang <b18965@freescale.com>
 Active  arm         armv7          zynq        xilinx          zynq                zynq_microzed                        -                                                                                                                                  Michal Simek <monstr@monstr.eu>:Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
 Active  arm         armv7          zynq        xilinx          zynq                zynq_zc70x                           -                                                                                                                                  Michal Simek <monstr@monstr.eu>:Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
+Active  arm         armv7          zynq        xilinx          zynq                zynq_zc70x_sel4                      -                                                                                                                                  Adrian Herrera <adrian.herrera@dsto.defence.gov.au>
 Active  arm         armv7          zynq        xilinx          zynq                zynq_zc770_XM010                     zynq_zc770:ZC770_XM010                                                                                                             Michal Simek <monstr@monstr.eu>:Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
 Active  arm         armv7          zynq        xilinx          zynq                zynq_zc770_XM011                     zynq_zc770:ZC770_XM011                                                                                                             Michal Simek <michal.simek@xilinx.com>
 Active  arm         armv7          zynq        xilinx          zynq                zynq_zc770_XM012                     zynq_zc770:ZC770_XM012                                                                                                             Michal Simek <monstr@monstr.eu>:Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
diff --git a/include/configs/zynq_zc70x_sel4.h b/include/configs/zynq_zc70x_sel4.h
new file mode 100644
index 0000000..f8bbac5
--- /dev/null
+++ b/include/configs/zynq_zc70x_sel4.h
@@ -0,0 +1,60 @@
+/*
+ * (C) Copyright 2013 Xilinx, Inc.
+ *
+ * Configuration settings for the Xilinx Zynq ZC702 and ZC706 boards
+ * See zynq-common.h for Zynq common configs
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_ZYNQ_ZC70X_SEL4_H
+#define __CONFIG_ZYNQ_ZC70X_SEL4_H
+
+#define CONFIG_SYS_SDRAM_SIZE		(1024 * 1024 * 1024)
+
+#define CONFIG_ZYNQ_SERIAL_UART1
+#define CONFIG_ZYNQ_GEM0
+#define CONFIG_ZYNQ_GEM_PHY_ADDR0	7
+
+#define CONFIG_SYS_NO_FLASH
+
+#define CONFIG_ZYNQ_SDHCI0
+#define CONFIG_ZYNQ_USB
+#define CONFIG_ZYNQ_QSPI
+#define CONFIG_ZYNQ_I2C0
+#define CONFIG_ZYNQ_EEPROM
+
+#include <configs/zynq-common.h>
+
+/* Enable boot from ELF image */
+#define CONFIG_CMD_ELF
+
+/* U-Boot prompt */
+#if defined(CONFIG_SYS_PROMPT)
+#undef CONFIG_SYS_PROMPT
+#endif
+
+#define CONFIG_SYS_PROMPT    "zynq-seL4-uboot > "
+
+/* Default environment */
+#if defined(CONFIG_EXTRA_ENV_SETTINGS)
+#undef CONFIG_EXTRA_ENV_SETTINGS
+#endif
+
+#define CONFIG_EXTRA_ENV_SETTINGS                                           \
+    "ethaddr=00:0a:35:00:01:22\0"                                           \
+    "bitstream_image=system.bit.bin\0"                                      \
+    "boot_image=BOOT.bin\0"                                                 \
+    "loadbit_addr=0x100000\0"                                               \
+    "mmc_loadbit_fat=echo Loading bitstream from SD/MMC/eMMC to RAM...;"    \
+        "mmcinfo && "                                                       \
+        "fatload mmc 0 ${loadbit_addr} ${bitstream_image} && "              \
+        "fpga load 0 ${loadbit_addr} ${filesize}\0"                         \
+    "sel4_image=sel4/sel4-image\0"                                          \
+    "loadsel4_addr=0x2080000\0"                                             \
+    "sdboot=echo Loading seL4 image from SD/MMC/eMMC to RAM...;"            \
+        "mmcinfo && "                                                       \
+        "fatload mmc 0 ${loadsel4_addr} ${sel4_image} && "                  \
+        "bootelf ${loadsel4_addr}\0"
+
+#endif /* __CONFIG_ZYNQ_ZC70X_SEL4_H */
-- 
1.9.1

To get U-boot:

git clone https://github.com/xilinx/u-boot-xlnx.git
cd u-boot-xlnx.git
patch -p1 < 0001-Added-Zynq-ZC70x-board-for-seL4.patch
export CROSS_COMPILE=arm-linux-gnueabi-
make zynq_zc70x_sel4_config
make

The u-boot file cannot be booted directly. You must first generate a boot image:

cp u-boot u-boot.elf
echo "image: { $PWD/u-boot.elf }" > boot.bif
/opt/Xilinx/SDK/2014.4/bin/bootgen -o BOOT.BIN -w -image image.bif

To boot from the SD card, make sure that the first partition of the SD card is FAT32 and copy BOOT.bin to the root directory.

Development environment

Vivado SDK

Bitstream generation (ie FPGA code compiler) is not support for ZC706 when using a free license. Other features may still work

The Vivado SDK provides many features:

  • first stage boot loader and boot image generation
  • FPGA logic design
  • ARM software design
  • Support libraries
  • JTAG connectivity and debugging

Download it here (Requires a free Xilinx account).

After the download completes, extract and/or run the install program. You should run as root to install cable drivers, otherwise, they can be installed independently later.

When provided with install options, select “Vivado Design Edition” because the WebPack install does not support the ZC706 board. Ensure the Software Development Kit (SDK) is selected as an install candidate

When installation competes, the License Manager window will open. Choose “obtain license” from the tree on the left, select “Get Free Licenses” and click “Connect Now”. You will be navigated to the Xilinx login page in order to register for a license. Select the free webpack license and a license file will be mailed to you. While still in the License Manager, click “Load License” from the tree on the left and click the “Copy License” button. Select the license file that you received via email and click “Open”. Once you have configured your license, close the window and wait for the install to finish.

The last step is to install the cable drivers as follows:

uname -a | grep "x86_64" && LIN=lin64 || LIN=lin
cd /opt/Xilinx/SDK/2014.4/data/xicom/cable_drivers/$LIN/install_script/install_drivers
sudo ./install_drivers

JTAG

http://wiki.gentoo.org/wiki/Xilinx_USB_JTAG_Programmers

You will need:

  • xmd (shipped with vivado but can possibly be obtained as a package on its own)
  • digilent USB drivers
  1. create a xmd.ini script within the directory that you intend to run xmd from.
      # Connect to the board
      connect arm hw
      # program the fpga with the provided bitstream
      fpga -f system_wrapper.bit
      # The processor needs to be initialised (Clocks, MIO, etc), but these depend on the bitstream! ps7_init.tcl was generated with the bitstream. Load and execute this script to configure the processor.
      source ps7_init.tcl
      ps7_init
      ps7_post_config
      # Download your elf file (Could also be done from GDB)
      dow bootimg.elf
      # To run the elf file directly from XMD, uncomment the following lines
      # run
      # exit
    
  2. Run XMD. On my system, the executable is: ‘/opt/Xilinx/SDK/2013.4/bin/lin64/xmd’. XMD will not terminate; leave it open.
  3. Next run GDB. On my system, the executable is: ‘/opt/Xilinx/SDK/2013.4/gnu/arm/lin/bin/arm-xilinx-eabi-gdb bootimg.elf’, but any arm-*-gdb should work
  4. enter “tar ext localhost:1234” to connect to the GDB server that was started by XMD or the hw_server
  5. “c” to start the program!

Version 2013.4 of GDB throws an error about an inaccessible memory address. This is fixed in version 2014.4 of the tools, but also requires 2014.4 of XMD of hw_server.